The present invention relates to an apparatus for converting analog signals to digital signals. The invention more particularly relates to circuitry for converting analog signals to digital signals in both discrete and continuous time domains.
Many different types of analog to digital converters are known in the art. Perhaps the most common analog to digital converters are the successive approximation converters, the flash converters, and the dual slope converters. Each have their advantages and disadvantages. For example, the successive approximation converters typically permit accurate conversion to at least twelve bits, but are only of medium speed and in certain embodiments require digital to analog converters having 2.sup.n capacitors, where n is the number of bits in the output word. The flash converters are much faster than the successive approximation converters, but require 2.sup.n-1 comparators, thus making them costly in terms of components. Moreover, flash converters currently available have an accuracy of at most nine bits of resolution. Finally, while permitting finer resolution and fewer components, the dual slope converters are considered much too slow for most applications.
Another analog to digital converter called a recirculating-cyclic converter or serial successive rectification converter is known in the art. It uses a cyclic, or stage-by-stage conversion algorithm originally employed in high-speed, low-resolution applications, and is described in an article by Doug Rife entitled "High Accuracy with Standard ICs: An Elegant ADC's Forte", EDN, Apr. 28, 1982 pp. 137-144. Basically, according to the article, the input signal is compared to a midpoint (ground) to see which half of the permitted range it is in. A first bit of information is determined thereby. The input is then rectified, multiplied by two, and a reference voltage is subtracted therefrom through the use of an operational amplifier and resistor network. The voltage output V.sub.out, which is equal to 2.vertline.V.sub.in .vertline.-V.sub.ref is then recirculated to the input end where a second bit is determined by the comparator and the signal is again rectified, multiplied by two, and decreased by the reference voltage. The output is again recirculated, and in this manner, as many bits of resolution as desired may be obtained without increasing the component count. The cycle and resolution are controlled by the sampling timing. The Gray code output of the comparator of the circuit is converted into binary code through the use of an exclusive NOR gate.
The advantage of the serial successive rectification analog to digital converter is the reduction in the number of components required for conversion. Indeed, with recirculation, additional bits of resolution may be obtained without increasing the numbers of components used. However, the serial successive rectification converter is still only of medium speed, as each additional bit of resolution requires an additional cycle of processing.